1. Field of the Invention
This invention is related to a level converter and more particularly, relates to semiconductor circuitry which is provided on gallium arsenide (GaAs) as an integrated circuit for converting GaAs input logic signals to voltage levels which are applied to transmission lines for directly driving emitter coupled logic (ECL) circuits.
2. Related Applications
This invention is related to our co-pending "High-Gain Stabilized Converter", Ser. No. 264,898, filed 18 May 1981. This co-pending application describes a gallium arsenide converter employing a differential amplifier for converting ECL logic input signals to voltage levels capable of driving GaAs circuitry.
3. Description of the Prior Art
Numerous different types or families of integrated circuits are commercially available. Manufacturers of integrated circuits usually produce families of devices which are completely compatible with each other. Many families of integrated circuits have characteristics which are so similar that they permit the designers to mix families in the same system to obtain optimum performance.
It is not uncommon for manufacturers of families of integrated circuits to produce devices which are incompatible and in which the characteristics of the incompatible families of devices are not matched. Accordingly, some form of signal level conversion is required to assure that the logic signals from one of the families are properly sensed and processed for use in the other family.
More than one type of problem can arise when two different types of logic families are being connected in the same system. The power supply levels may be different and the logic voltage swings at the input and output may also be different. The signals being processed may also require reshaping, amplification and/or attenuation for proper use and synchronization.
When the conversion or translation of signals is implemented in high speed logic families, it is also important that the conversion logic does not create an inordinate time delay, otherwise, the reason for using a high speed logic family can be defeated by time delays at the interface converter.
These problems are understood by logic designers and have been considered in typical translators and converters sold by numerous semiconductor houses including Motorola, Inc. for interfacing ECL with transistor-transistor logic (TTL). These commercially available translators and converters cannot be used or modified for use with ECL and GaAs logic without encountering some of the afore-mentioned problems as well as the problems of stability, switching time and ringing which occur with high speed logic circuits. It would be desirable to avoid or eliminate the known and understood problems of translation and/or conversion when adapting a conversion unit for GaAs to ECL. Further, it would be highly desirable to provide the conversion circuitry as part of the output circuitry of the high speed logic and to provide this logic as part of an integrated circuit without the requirements of additional discrete components which would slow down the converter.
It would also be desirable if the converter or translation circuit has as few stages as possible and that they be free of generated noise and also be compensated against age degradation and temperature variation. Further, it would be desirable that the translating or compensating network be free from variations due to power supply voltages.